The present invention relates to a non-volatile semiconductor memory device having an impurity arrangement structure and suitable for, for example, high efficiency source side injection and high-speed erasure.
As flush EEPROMs, there are known a FG (Floating Gate) type EEPROM wherein a charge accumulation means is comprised of a single conductive layer, a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) type EEPROM and a MNOS (Metal-Nitride-Oxide-Nitride-Oxide) type EEPROM wherein charge accumulation means are made planarly discreted.
In the MONOS type memory element, for example, an ONO (Oxide-Nitride-Oxide) film and a gate electrode are stacked on a semiconductor substrate forming a transistor channel, and source and drain impurity regions having an inversion (a reverse) conductivity type to that of the channel are formed in the substrate surface region at both sides of the stacked pattern thereof.
Then, a charge is injected into a dielectric film (ONO film) having a charge holding faculty from the substrate side to perform writing. When erasing, the held charge is extracted to the substrate side or a charge having an inversion (a reverse) polarity for canceling the held charge is injected into the above dielectric film.
As the charge injection, in addition to utilizing a tunnel phenomenon of a charge in the dielectric film, there is known a method wherein a charge is energetically excited to a level which the charge exceeds an insulation barrier of an oxide film of the lowermost layer of the ONO film, such as the so-called CHE (Channel-Hot-Electron) injection.
As one type of the CHE injection method, a source side injection method is known.
To realize the source side injection method, an electrode for controlling a drain side channel and an electrode for controlling a source side channel must be separately provided. The reason for this is to render the drain side channel into a strong inversion (reverse) state and the source side channel into a weak inversion (reverse) state at the time of charge injection. At this time, high electric field occurs in the vicinity of the boundary of both channels thereof, a charge supplied from the source side is excited by this high electric field and injected from the source side to the charge accumulation means of the electrode for controlling the drain side channel. The injection efficiency is improved approximately one digit (10 times) more than a normal CHE injection.
Progress is being made on low voltage operation due to the demands of reducing consumption power and miniaturization of size of elements.
In the above CHE injection, however, in the case of for example the MONOS type memory transistor, it is known the charge injection efficiency, that is, the ratio of a current IG flowing towards a gate and a current ID flowing towards a drain deteriorates.
Further, it is notified that the charge injection efficiency of the FG type EEPROM is higher than that of the MONOS type EEPROM, however, that efficiency is insufficient. Employing the source side injection method further improves the charge injection efficiency, however, there has been encountered a limit in improving the charge injection efficiency of the current source side injection method.